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 PD - 94503
SMPS MOSFET
IRFP21N60L
HEXFET(R) Power MOSFET Applications * Zero Voltage Switching SMPS VDSS RDS(on) typ. Trr typ. ID * Telecom and Server Power Supplies * Uninterruptible Power Supplies 270m 600V 160ns 21A * Motor Control applications Features and Benefits * SuperFast body diode eliminates the need for external diodes in ZVS applications. * Lower Gate charge results in simpler drive requirements. * Enhanced dv/dt capabilities offer improved ruggedness. TO-247AC * Higher Gate voltage threshold offers improved noise immunity.
Absolute Maximum Ratings
Parameter
ID @ TC = 25C Continuous Drain Current, VGS @ 10V ID @ TC = 100C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM
Max.
21 13 84 330
Units
A W W/C V V/ns C
c
PD @TC = 25C Power Dissipation VGS dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw
d
2.6 30 11 -55 to + 150 300 (1.6mm from case ) 1.1(10)
N*m (lbf*in)
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ac Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- --- --- --- 160 400 480 5.3 21 A 84 1.5 240 610 730 7.9 nC A V ns
Conditions
MOSFET symbol showing the integral reverse
G D
p-n junction diode. TJ = 25C, IS = 21A, VGS = 0V TJ = 25C, IF = 21A TJ = 125C, di/dt = 100A/s
J
J
f
S
1540 2310
f T = 25C, I = 21A, V = 0V f T = 125C, di/dt = 100A/s f
S GS
TJ = 25C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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1
02/18/03
IRFP21N60L
Static @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
Min. Typ. Max. Units
600 --- --- 3.0 --- --- --- --- --- --- 0.42 270 --- --- --- --- --- 0.63 --- --- 320 5.0 50 2.0 100 -100 --- V m V A mA nA
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 13A
V/C Reference to 25C, ID = 1mA
f
VDS = VGS, ID = 250A VDS = 600V, VGS = 0V VDS = 480V, VGS = 0V, TJ = 125C VGS = 30V VGS = -30V f = 1MHz, open drain
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss eff. Coss eff. (ER)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related)
Min. Typ. Max. Units
11 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 20 58 33 10 4000 340 29 170 130 --- 150 46 64 --- --- --- --- --- --- --- --- --- pF ns nC S ID = 21A
Conditions
VDS = 50V, ID = 13A VDS = 480V VGS = 10V, See Fig. 7 & 15 VDD = 300V ID = 21A RG = 1.3 VGS = 10V, See Fig. 11a & 11b VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V,VDS = 0V to 480V
f f
g
Avalanche Characteristics
Symbol
EAS IAR EAR Parameter Single Pulse Avalanche Energyd Avalanche CurrentA Repetitive Avalanche Energy Typ. --- --- --- Max. 420 21 33 Units mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.38 --- 40
Units
C/W
Notes: Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11) Starting TJ = 25C, L = 1.9mH, RG = 25, IAS = 21A, dv/dt = 11V/ns. (See Figure 12a) ISD 21A, di/dt 530A/s, VDD V(BR)DSS, TJ 150C.
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% V DSS . Coss eff.(ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80% V DSS .
2
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IRFP21N60L
1000
TOP VGS 15V 12V 10V 8.0V 7.0V 6.5V 6.0V 5.5V
100
TOP VGS 15V 12V 10V 8.0V 7.0V 6.5V 6.0V 5.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
10
BOTTOM
10
BOTTOM
1
1
5.5V
0.1
5.5V
0.01
0.1
20s PULSE WIDTH Tj = 25C
0.001 0.1 1 10 100 1000 0.01 0.1 1
20s PULSE WIDTH Tj = 150C
10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
RDS(on) , Drain-to-Source On Resistance
ID = 21A
2.5
ID, Drain-to-Source Current ()
100
VGS = 10V
T J = 150C
10
2.0
(Normalized)
1.5
1
T J = 25C
0.1
1.0
VDS = 50V 20s PULSE WIDTH
0.01 4 6 8 10 12 14 16
0.5
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
T J , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
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IRFP21N60L
100000 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED 10000 Crss = Cgd Coss = Cds + Cgd
25
20
C, Capacitance(pF)
Ciss
1000
Coss
Energy (J)
15
10
100
Crss
5
10 1 10 100 1000
0 0 100 200 300 400 500 600 700
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typ. Output Capacitance Stored Energy vs. VDS
12.0 ID= 21A
VGS , Gate-to-Source Voltage (V)
100.00
VDS= 480V VDS= 300V VDS= 120V
ISD, Reverse Drain Current (A)
10.0
T J = 150C 10.00
8.0 6.0
4.0
1.00
T J = 25C
2.0
VGS = 0V
0.0 0 20 40 60 80 100 120 Q G Total Gate Charge (nC)
0.10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Gate Charge vs. Gate-to-Source Voltage
Fig 8. Typical Source-Drain Diode Forward Voltage
4
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IRFP21N60L
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
ID, Drain Current (A)
25
ID, Drain-to-Source Current (A)
20
100 15
10
100sec 1msec
10
1 Tc = 25C Tj = 150C Single Pulse 0.1 1 10 100 1000 10000 VDS, Drain-to-Source Voltage (V) 10msec
5
0 25 50 75 100 125 150 T C , Case Temperature (C)
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current vs. Case Temperature
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
RD
VDS 90%
D.U.T.
+
-VDD
10% VGS
td(on) tr t d(off) tf
Fig 11a. Switching Time Test Circuit
Fig 11b. Switching Time Waveforms
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5
IRFP21N60L
1
Thermal Response ( Z thJC )
D = 0.50
0.1
0.20 0.10 0.05
0.01
0.02 0.01
P DM t1
0.001
SINGLE PULSE ( THERMAL RESPONSE )
t2
Notes: 1. Duty factor D = 2. Peak T t1/ t 2 +T C
J = P DM x Z thJC
0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5.0
VGS(th) Gate threshold Voltage (V)
4.0
ID = 250A
3.0
2.0
1.0 -75 -50 -25 0 25 50 75 100 125 150
T J , Temperature ( C )
Fig 13. Threshold Voltage vs. Temperature
6
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IRFP21N60L
800
EAS , Single Pulse Avalanche Energy (mJ)
700 600 500 400 300 200 100 0 25 50 75
ID 9.4A 13A BOTTOM 21A TOP
100
125
150
Starting T J , Junction Temperature (C)
Fig 14a. Maximum Avalanche Energy vs. Drain Current
15V
V(BR)DSS
VDS L
DRIVER
tp
RG
20V
D.U.T
IAS tp
+ - VDD
A
0.01
I AS
Fig 14b. Unclamped Inductive Test Circuit
Current Regulator Same Type as D.U.T.
Fig 14c. Unclamped Inductive Waveforms
50K 12V .2F .3F
QG
VGS V
D.U.T. + V - DS
QGS VG
QGD
VGS
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 15a. Gate Charge Test Circuit
Fig 15b. Basic Gate Charge Waveform
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7
IRFP21N60L
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 16. For N-Channel HEXFET(R) Power MOSFETs
8
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IRFP21N60L
Dimensions are shown in millimeters (inches)
15.90 (.626) 15.30 (.602) -B3.65 (.143) 3.55 (.140) 0.25 (.010) M D B M -A5.50 (.217) 20.30 (.800) 19.70 (.775) 1 2 3 -C14.80 (.583) 14.20 (.559) 4.30 (.170) 3.70 (.145)
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
TO-247AC Package Outline
-D5.30 (.209) 4.70 (.185) 2.50 (.089) 1.50 (.059) 4
2X
5.50 (.217) 4.50 (.177)
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-247-AC.
2.40 (.094) 2.00 (.079) 2X 5.45 (.215) 2X
1.40 (.056) 3X 1.00 (.039) 0.25 (.010) M 3.40 (.133) 3.00 (.118) C AS
0.80 (.031) 3X 0.40 (.016) 2.60 (.102) 2.20 (.087)
TO-247AC Part Marking Information
Notes : T his part marking information applies to devices produced after 02/26/2001
EXAMPLE: T HIS IS AN IRFPE30 WITH AS S EMBLY LOT CODE 5657 AS S EMBLED ON WW 35, 2000 IN T HE AS S EMBLY LINE "H" PART NUMBER
IRF PE30
56 035H 57
INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE
DATE CODE YEAR 0 = 2000 WEEK 35 LINE H
TO-247AC package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/03
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9


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